The present invention relates to probe measurement systems for testing integrated circuits and other microelectronic devices and, more particularly, probe measurement systems utilizing differential signaling for testing microelectronic devices.
Integrated circuits (ICs) are economically attractive because large numbers of often complex circuits, for example microprocessors, can be inexpensively fabricated on the surface of a wafer or substrate. Following fabrication, individual dies, including one or more circuits, are separated or singulated and encased in a package that provides for electrical connections between the exterior of the package and the circuit on the enclosed die. The separation and packaging of a die comprises a significant portion of the cost of manufacturing an integrated circuit device and to monitor and control the IC fabrication process and avoid the cost of packaging defective dies, manufacturers commonly add electrical circuits or test structures to the wafer to enable on-wafer testing or “probing” to verify characteristics of the integrated circuits before the dies are singulated.
Referring to FIG. 1, a test structure 20 typically includes a device-under-test (DUT) 22, a plurality of metallic probe or bond pads 24 that are deposited at the wafer's surface and a plurality of conductive vias 26 that connect the probe pads to the DUT which is typically fabricated beneath the surface of the wafer 28. The DUT typically comprises a simple circuit that includes a copy of one or more of the basic elements of the integrated circuit, such as a single line of conducting material, a chain of vias or a single transistor. The circuit elements of the DUT are typically produced with the same process and in the same layers of the fabrication as the corresponding elements of the integrated circuit. The marketable ICs are typically evaluated or characterized “on-wafer” by applying a test instrument generated signal to the test structure and measuring the response of the test structure to the signal. Since the circuit elements of the DUT are fabricated with the same process as the corresponding elements of the marketable integrated circuit, the electrical properties of the DUT are expected to be representative of the electrical properties of the corresponding components of the ICs.
Integrated circuits commonly utilize single ended or ground referenced signaling with a ground plane at the lower surface of the substrate on which the active and passive devices of the circuit are fabricated. As a result of the physical make up of the devices of an integrated circuit, parasitic interconnections exist between many of the parts of the individual devices and between parts of the devices and the wafer on which the devices are fabricated. These interconnections are commonly capacitive and/or inductive in nature and have frequency dependent impedances. For example, the terminals of transistors fabricated on semi-conductive substrates or wafers are typically capacitively interconnected, through the substrate, to the ground plane. The impedance of this parasitic capacitive interconnection is frequency dependent and at higher frequencies the ground potential and the true nature of ground referenced signals becomes uncertain.
Balanced devices utilizing differential signals are more tolerant to poor radio frequency (RF) grounding than single ended devices making them attractive for high performance ICs. A differential gain cell 30 is a balanced device comprising two nominally identical circuit halves 30A, 30B. When biased, with a DC current source 32, and stimulated with a differential mode signal, comprising even and odd mode components of equal amplitude and opposite phase (Si+1 and Si−1) 34, 36, a virtual ground is established at the symmetrical axis 38 of the two circuit halves. At the virtual ground, the potential at the operating frequency does not change with time regardless of the amplitude of the stimulating signal. The quality of the virtual ground of a balanced device is independent of the physical ground path and, therefore, balanced or differential circuits can tolerate poor RF grounding better than circuits operated with single ended signals.
In addition, the two waveforms of the differential output signal (So+1 and So−1) 40, 42 are mutual references providing faster and more certain transition from one binary value to the other for digital devices and enabling operation with a reduced voltage swing for the signal. Typically, differential devices can operate at lower signal power and higher data rates than single ended devices. Moreover, noise from external sources, such as adjacent conductors, tends to couple, electrically and electromagnetically, in the common mode and cancel in the differential mode. As a result, balanced or differential circuits have good immunity to noise, including noise at even-harmonic frequencies since signals that are of opposite phase at the fundamental frequency are in phase at the even harmonics. Improved tolerance to poor RF grounding, increased resistance to noise and reduced power consumption make differential devices attractive for ICs that operate at higher frequencies. A test structure comprising a differential gain cell enables on wafer testing and characterization of differential devices included in the marketable ICs fabricated on the wafer.
At higher frequencies, on-wafer characterization is commonly performed with a network analyzer. The network analyzer comprises a source of an AC signal, commonly, a radio frequency (RF) signal, that is used to stimulate the DUT of a test structure. A forward-reverse switch directs the stimulating signals to one or more of the probe pads of the test structure. Directional couplers or bridges pick off the forward or reverse waves traveling to or from the test structure which are down-converted by intermediate frequency (IF) sections of the network analyzer where the signals are filtered, amplified and digitized for further processing and display. The result is a plurality of s-parameters (scattering parameters), the ratio of a normalized power wave comprising the response of the DUT to the normalized power wave comprising the stimulus supplied by the signal source.
At higher frequencies, the preferred interconnection for communicating signals between the test structure, the source of the stimulating test signal and the sink for the output signals of the test structure is coaxial cable. The transition between the coaxial cable and the probe pads of the test structure is preferably provided by movable probes having one or more conductive probe tips 44 that are arranged to be co-locatable with respective probe pads of the test structure. The test instrumentation and the test structure can be temporarily interconnected for probing by bringing the probe tips of the probe(s) into contact with the probe pads of the test structure. Typically, two probes 46, 48 are utilized when probing a differential or balanced test structure. A differential gain cell requires two input probe pads 50, 52 and two output probe pads 54, 56 for the even and odd mode components of the differential input and output signals and a bias probe pad 58 through which the transistors of the cell are biased. The probe pads of differential test structures are arranged to avoid physical contact and crosstalk between the two probes during simultaneous engagement with the test structure. As a result, the probe pads of a differential test structure occupy a significant portion of the useable surface of a wafer and, typically, must be fabricated in an area of the wafer in which one or more dies containing marketable ICs could otherwise be fabricated. However, test structures serve no purpose after the dies containing the marketable ICs are singulated and manufacturers of ICs are under continuous cost pressure to maximize the number of marketable ICs that are manufactured on each wafer.
What is desired, therefore, is a compact, simplified probe measurement system for communicating differential signals between a test instrument and a test structure.